A single CPU instruction, stretched from a blink to a full minute

2 months ago

Think of a single instruction as the smallest step your processor takes. On a new leaderboard, that one step ranges from a blink to a full minute.

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Chapters

  1. 0:00A single CPU instruction, stretched from a blink to a full minute
  2. 0:09A leaderboard racing to the slowest single instruction ever measured
  3. 0:22A single instruction has no fixed cost
  4. 0:29Three ways one instruction gets slow
  5. 1:01One instruction, plus a fleet of cores clogging the same path: 62 seconds
  6. 1:20Not a broken chip, and not a hack
  7. 1:31One instruction is a request to a whole machine
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A single CPU instruction, stretched from a blink to a full minute

A single CPU instruction, stretched from a blink to a full minute.

The same one step: a fraction of a nanosecond, or 62 seconds.
systems processor internals 1 step → 62 seconds

Think of a single instruction as the smallest step your processor takes. On a new leaderboard, that one step ranges from a blink to a full minute.

A leaderboard racing to the slowest single instruction ever measured

A leaderboard racing to the slowest single instruction ever measured.

How fast is the usual goal. This one chases how slow.
One instruction, by how many steps it takes · log scale
do nothing nop
1
long division idiv
77
locked update across a line split lock
865
empty the cache wbinvd
1,616,480
slow device port in
12,524,415
off-chip read mov
443,937,696
big block from a far address fxrstor64
74,584,168,512
same, under contention fxrstor64
198,002,498,236
github.com/xoreaxeaxeax/asm-hall-of-shame · MIT · each entry ships the code that produced its number

Most performance work asks how fast code can run. This project asks the opposite: how slow can you force a single instruction to go? It ranks the slowest found so far. Every entry ships the code that produced its number.

A single instruction has no fixed cost

A single instruction has no fixed cost.

Its price is whatever the machine must do to finish it.
do nothing
1
1 step · a blink
nop · the whole instruction: do nothing
≈ 198 billion ×
the champion
198,002,498,236
steps · 62 seconds

An instruction's time is whatever the processor must do behind the scenes to finish it. The heavy ones pull the whole machine into the job.

Three ways one instruction gets slow

Three ways one instruction gets slow: a built-in program, emptying memory, or a trip off the chip.

1
Runs a built-in program
long division (idiv)
77 stepsdozens of steps
2
Empties its fast memory to main memory
empty the cache (wbinvd)
1,616,480 stepsover a million steps
3
Leaves the chip for a far-away device
off-chip read (mov)
443,937,696 stepshundreds of millions of steps

One instruction slows down for three reasons, each deeper in the machine. First, for a hard case the chip cannot handle the quick way, it runs a tiny built-in program of its own. Long division costs dozens of steps. Second, some instructions make the chip empty its fast memory back out to slow main memory. That is over a million steps. Third, a few leave the chip entirely, reaching out to a slow, far-away device and waiting for it to answer. That is hundreds of millions of steps.

One instruction, plus a fleet of cores clogging the same path: 62 seconds

One instruction, plus a fleet of cores clogging the same path: 62 seconds.

Only the single instruction is timed.
The timed instruction
Reloads a big block of saved data from a slow, far-away address.
fxrstor64
→
One shared path
to a slow, far-away device
←
A crowd of other cores
62 seconds
the timed load waits in line behind the flood, on that one shared path.

The champion reloads a big block of saved data from a slow, far-away address. A crowd of other cores floods that same path, so the timed instruction waits in line behind them all. That is how you force one instruction to sixty-two seconds. Only that one is timed, running under a deliberate traffic jam.

Not a broken chip, and not a hack

Not a broken chip, and not a hack. This is the machine doing its job.

Stock, unmodified chips, steered to the worst case.
stock silicon unmodified working as designed
Measured on different chips, each on its own clock.
github.com/xoreaxeaxeax/asm-hall-of-shame

You might read a minute-long instruction as a broken chip. It is not. Every one runs on a stock, unmodified processor, working exactly as designed, just pushed to its worst case.

One instruction is a request to a whole machine

One instruction is a request to a whole machine.

github.com/xoreaxeaxeax/asm-hall-of-shame

The lesson reaches past this leaderboard. The single step you picture as one instruction is really a request to a whole machine. Its cost is how far that request has to travel.